In 1989, the CAD and SoC Design Laboratory (CSDL) was established by Professor Younghwan Kim. The main research topics in CSDL are SoC design, hardware/software codesign, low-power design, design methodology and image processing. Recently, we are focusing on AI-based EDA (electronic design automation), and AI-hardware design.
The Professor Seokhyeong Kang, who received his master’s degree in 2001 at CSDL, joined as our new advisor in 2017. We are looking for talented students who would like to work with us on designing state-of-the-art SoC and CAD solutions. Candidates with experience or interest in any of the following areas will be considered seriously.
If you’re interested, please email Seokhyeong Kang (shkang@postech.ac.kr).
Lab Introduction PDF & Video
